Week #7: (10/17) Transistor Biasing

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rjagodowski
Posts: 1642
Joined: Fri Sep 04, 2015 6:59 pm

Week #7: (10/17) Transistor Biasing

Post by rjagodowski »

This week's lab will be Experiment #5 handouts on Transistor Bias Circuits. A copy will be provided for you during Tuesday's class on 10/25. A pdf of this lab can be found in the Registered Users Only area here. You must be registered and logged in to view content in this area.)

You may find this link to Transistor Biasing from Electronics-Tutorials.ws handy.

When you complete this exercise, create a progress report post as a Reply to this Topic.

You will perform the calculations, build and test the four circuits in Part 1 of the lab sheets, then build them in EWB or Circuit Maker and compare the results to your measurements and calculations. The circuits in Part 2 you will build only in EWB or Circuit Maker.

Part 1: Build & verify all 4 circuits. You may substitute a 2N2222 for the 2N3904. Suggestion: Use your multi-meter to check each transistor BEFORE putting it in the circuit. Here is a pdf of the procedure:
Transistor DMM Check.pdf
(71.08 KiB) Downloaded 55 times
You will make the measurements for each of 3 transistors for each circuit. This will help demonstrate the stability of the Q-point with respect to transistor variations. Sample EWB files are included below for your convenience. You can change the value of beta used in the WEB IDEAL transistor model by right-clicking on the transistor, select properties and then adjust the Forward Current Gain parameter to the value of beta.

Here are the formulas required for each circuit:

Fig. 5-1:
VRB=VCC-0.7V
IB=(VCC-0.7V)/RB
IC=(beta)*IB (assume beta around 150-200)
VRC=IC * RC
VC=12V-VRC
VCE=VC-VE=VC-0=VC


Fig. 5-2:
IB=(VCC-0.7)/(RB+beta*RE)
VRB=IB*RB
IC=beta*IB
VRC=IC*RC
VC=VCC-VRC
VCE=VC-VE=VC-VRE where VRE=IC*RE

Fig. 5-3:
VB=VCC(R2/(R1+R2))
VE=VB-0.7
IE=IC=(VE-0)/RE
VRC=IC*RC
VC=VCC-VRC
VCE=VC-VE

Fig. 5-4:
VB=0.7
IE=IC= (VCC-VBE)/(RB/beta+RC)=(VCC-0.7)/(RB/beta+RC)
VRC=IC*RC
VC=VCC-VRC

And here's a pdf of the above:
Formulas.pdf
(145.14 KiB) Downloaded 31 times
Part 2: Do not build these circuits. (EWB should be available within the next few weeks.) Verify these circuits using Electronics Workbench only. You have to create these circuits on your own. Be sure to save the EWB file for each circuit you create.
Attachments
Transistor Pinouts.jpg
Transistor Pinouts.jpg (150.78 KiB) Viewed 734 times
Transistor Biasing Lab v15.1.pdf
(2.54 MiB) Downloaded 29 times
flrosado0001
Posts: 61
Joined: Tue Sep 12, 2017 11:37 am

Re: Week #7: (10/17) Transistor Biasing

Post by flrosado0001 »

Fernando R. Josh D. Lab Completed.
njberrios
Posts: 47
Joined: Thu Sep 14, 2017 1:09 pm

Re: Week #7: (10/17) Transistor Biasing

Post by njberrios »

lab complete
djean0001
Posts: 56
Joined: Tue Sep 12, 2017 1:38 pm

Re: Week #7: (10/17) Transistor Biasing

Post by djean0001 »

David Jean, Lab has been completed.
mhau
Posts: 42
Joined: Tue Sep 13, 2016 2:39 pm

Re: Week #7: (10/17) Transistor Biasing

Post by mhau »

Micah Lab done.
mafitzgerald0001
Posts: 26
Joined: Thu Oct 27, 2016 2:34 pm

Re: Week #7: (10/17) Transistor Biasing

Post by mafitzgerald0001 »

Mark's lab done.
npgrenier0001
Posts: 56
Joined: Thu Sep 21, 2017 11:59 am

Re: Week #7: (10/17) Transistor Biasing

Post by npgrenier0001 »

Nathan Grenier & Chris LaPan
Lab Completed.
crlapan
Posts: 56
Joined: Tue Sep 12, 2017 10:19 am

Re: Week #7: (10/17) Transistor Biasing

Post by crlapan »

CHRIS LAPAN & NATE GRENIER
Lab Completed.
jmllabaly0001
Posts: 45
Joined: Tue Sep 13, 2016 2:41 pm

Re: Week #7: (10/17) Transistor Biasing

Post by jmllabaly0001 »

Lab complete
JoseL.
ajjanczulewicz0001
Posts: 48
Joined: Tue Sep 13, 2016 2:49 pm

Re: Week #7: (10/17) Transistor Biasing

Post by ajjanczulewicz0001 »

Anthony J and Joel C Lab is complete
asingh0001
Posts: 55
Joined: Wed Oct 05, 2016 10:16 am

Re: Week #7: (10/17) Transistor Biasing

Post by asingh0001 »

Lab Completed
Amrit
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