Week #8: Lab Practical Exam: Mid-Semester

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rjagodowski
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Joined: Fri Sep 04, 2015 6:59 pm

Week #8: Lab Practical Exam: Mid-Semester

Post by rjagodowski » Mon Oct 14, 2019 11:10 pm

This week you will individually perform a lab practical exam. You will be required to build a combinational digital logic circuit, construct and complete the truth table for the circuit, and label your schematic with the chip & pin numbers used. You will be given approximately 20 minutes to complete the exercise, and then you will begin the regularly scheduled lab for the week.

A SAMPLE of the actual exercise used in a previous year is attached below. Feel free to review this exercise before you take the lab practical.
EET-210L SAMPLE Lab Evaluation #1 v18.1.pdf
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avkaptyug0001
Posts: 27
Joined: Fri Sep 07, 2018 10:15 am

Re: Week #8: Lab Practical Exam: Mid-Semester

Post by avkaptyug0001 » Fri Dec 13, 2019 12:02 am

Artur completed that lab

kjbusiere0001
Posts: 28
Joined: Fri Jan 26, 2018 10:10 am

Re: Week #8: Lab Practical Exam: Mid-Semester

Post by kjbusiere0001 » Fri Dec 13, 2019 6:42 pm

I have completed the lab practical.

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