Week #5: (10/5-9) Logic Circuit Design with Muxes.

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Week #5: (10/5-9) Logic Circuit Design with Muxes.

Post by rjagodowski »

This week you will investigate the process of implementing a logic function using multiplexers (Muxes) and data selectors. His the Lab Sheet and Support materials for this week's lab. Printed copies of the lab sheet and MUX pinouts will be given to you in lab. NOTE: This lab has been updated since the beginning of the Fall 2020 semester.
Lab 4 Logic Design using MUXES v20.1.pdf
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74150-151 Pinout v19.1.pdf
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This pdf is long so it wasn't printed:
74150_74151_CompleteDataSheet v19.1.pdf
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You may find this pdf, which was presented & discussed in lecture on 9/30, helpful:
Using a Mux for Truth Table_Editted_f05_week05.pdf
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Here's a pic of the whiteboard notes for this lab from 10/6/20:
EET-210L Lab #4 Board Notes.jpg
EET-210L Lab #4 Board Notes.jpg (2.31 MiB) Viewed 150 times

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Re: Week #5: Logic Circuit Design with Muxes.

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Re: Week #5: (10/5-9) Logic Circuit Design with Muxes.

Post by drodriguez0004 »

10/08 Lab
20201123_132057 (1).jpg
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