Week #8: Lab Practical Exam: Mid-Semester

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rjagodowski
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Joined: Fri Sep 04, 2015 6:59 pm

Week #8: Lab Practical Exam: Mid-Semester

Post by rjagodowski »

This week you will individually perform a lab practical exam. You will be required to build a combinational digital logic circuit, construct and complete the truth table for the circuit, and label your schematic with the chip & pin numbers used. You will be given approximately 20 minutes to complete the exercise, and then you will begin the regularly scheduled lab for the week.

A SAMPLE of the actual exercise used in a previous year is attached below. Feel free to review this exercise before you take the lab practical.
EET-210L SAMPLE Lab Evaluation #1 v18.1.pdf
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keashley0001
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Joined: Fri Sep 06, 2019 3:03 pm

Re: Week #8: Lab Practical Exam: Mid-Semester

Post by keashley0001 »

Keith Ashley
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scope_KEA FINAL210.zip
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